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FEATURES High Speed AD8130: 270 MHz, 1090 V/ s @ G = 1 AD8129: 200 MHz, 1060 V/ s @ G = 10 High CMRR 94 dB Min, DC to 100 kHz 80 dB Min @ 2 MHz 70 dB @ 10 MHz High-Input Impedance: 1 M Differential Input Common-Mode Range 10.5 V Low Noise AD8130: 12.5 nV/Hz AD8129: 4.5 nV/Hz Low Distortion, 1 V p-p @ 5 MHz: AD8130, -79 dBc Worst Harmonic @ 5 MHz AD8129, -74 dBc Worst Harmonic @ 5 MHz User-Adjustable Gain No External Components for G = 1 Power Supply Range +4.5 V to 12.6 V Power-Down APPLICATIONS High-Speed Differential Line Receiver Differential-to-Single-Ended Converter High-Speed Instrumentation Amp Level-Shifting GENERAL DESCRIPTION
Low-Cost 270 MHz Differential Receiver Amplifiers AD8129/AD8130
CONNECTION DIAGRAM (Top View) SO-8 (R) and Micro_SO-8 (RM)
+IN 1 -VS 2 PD 3 REF 4
AD8129/ AD8130
8 -IN 7 +VS 6 OUT 5 FB
+
data transmission. The AD8129 and AD8130 are differentialto-single-ended amplifiers with extremely high CMRR at high frequency. Therefore, they can also be effectively used as high-speed instrumentation amps or for converting differential signals to single-ended signals. The AD8129 is a low-noise high-gain (10 or greater) version intended for applications over very long cables where signal attenuation is significant. The AD8130 is stable at a gain of one and can be used for those applications where lower gains are required. Both have user adjustable gain to help compensate for losses in the transmission line. The gain is set by the ratio of two resistor values. The AD8129 and AD8130 have very high input impedance on both inputs regardless of the gain setting. The AD8129 and AD8130 have excellent common-mode rejection (70 dB @ 10 MHz) allowing the use of low cost unshielded twisted-pair cables without fear of corruption by external noise sources or crosstalk. The AD8129 and AD8130 have a wide power supply range from single 5 V supply to 12 V, allowing wide common-mode and differential-mode voltage ranges while maintaining signal integrity. The wide common-mode voltage range will enable the driver receiver pair to operate without isolation transformers in many systems where the ground potential difference between drive and receive locations is many volts. The AD8129 and AD8130 have considerable cost and performance improvements over op amps and other multi-amplifier receiving solutions.
PD +VS
The AD8129 and AD8130 are designed as receivers for the transmission of high-speed signals over twisted-pair cables to work with the AD8131 or AD8132 drivers. Either can be used for analog or digital video signals and for high-speed
120 110 100 90 80 70 60 50 40 30 10k 100k 1M FREQUENCY - Hz 10M 100M
CMRR - dB
VIN VOUT
RG
RF
Figure 1. AD8129 CMRR vs. Frequency
-VS V OUT = VIN [1+(R F /R G )]
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Figure 2. Typical Connection Configuration
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2001
AD8129/AD8130-SPECIFICATIONS
(AD8129 G = 10, AD8130 G = 1, TA = 25 C, VS = otherwise noted. TMIN to TMAX = -40 C to +85 C, unless otherwise noted.)
Model Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Time Output Overdrive Recovery NOISE/DISTORTION Second Harmonic/Third Harmonic Conditions VOUT 0.3 V p-p VOUT = 2 V p-p VOUT 0.3 V p-p, SOIC/SOIC VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT 1 V p-p, 10% to 90% Min 175 170 925
5 V SPECIFICATIONS
5 V, REF = 0 V, PD VIH, RL = 1 k , CL = 2 pF, unless
AD8130A Typ 270 155 45 1090 20 1.4 40 -79/-86 -74/-81 -74/-80 -74/-76 -70 26 12.5 1 1.4 0.13 0.15 90 80 110 70 83 3.8 2.5 2.8 6 4 3 4 0.15 10 74 200 0.4 10 -78 -80 0.5 1 5 0.08 0.2 3.6/4.0
AD8129A Typ 200 190 30/50 1060 20 1.7 30 -74/-84 -68/-74 -67/-81 -61/-70 -67 25 4.5 1 1.4 0.3 0.1
Max
Min 240 140 950
Max
Unit MHz MHz MHz V/s ns ns ns dBc dBc dBc dBc dBc dBm nV/Hz pA/Hz pA/Hz % Degrees dB dB dB dB V V V M M pF pF % ppm/C dB ppm mV V/C mV dB dB A A nA/C A nA/C V mA mA A/C pF
IMD Output IP3 Input Voltage Noise (RTI) Input Current Noise (+IN, -IN) Input Current Noise (REF, FB) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Common-Mode Rejection Ratio
VOUT = 1 V p-p, 5 MHz VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz f 10 kHz f 100 kHz f 100 kHz AD8130, G = 2, NTSC 200 IRE, R L 150 AD8130, G = 2, NTSC 200 IRE, R L 150 DC to 100 kHz, VCM = -3 V to +3.5 V VCM = 1 V p-p @ 2 MHz VCM = 1 V p-p @ 10 MHz VCM = 2 V p-p @ 1 kHz, VOUT = 0.5 V dc V+IN - V-IN = 0 V Differential Common-Mode Differential Common-Mode VOUT = 1 V, RL 150 TMIN to TMAX VOUT = 1 V VOUT = 1 V TMIN to TMAX TMIN to TMAX +VS = +5 V, -VS = -4.5 V to -5.5 V -VS = -5 V, +VS = +4.5 V to +5.5 V TMIN to TMAX (+IN, -IN, REF, FB) (+IN, -IN, REF, FB) TMIN to TMAX RLOAD = 150 /1 k To Common TMIN to TMAX PD VIL, In Power-Down Mode Total Supply Voltage TMIN to TMAX PD VIL PD VIL, TMIN to TMAX 2.25 3.6/4.0 94 80
110 70 100 3.5 0.5 0.75 1 4 3 4 0.4 20 88 250 0.2 2 -90 -94 0.5 1 5 0.08 0.2
CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage
0.6
0.85
2.3
3.3
1.5
0.6
0.8 1.4 -84 -86 2 3.5 0.4
1.8 3.5 -74 -74 2 3.5 0.4
Input Offset Voltage vs. Supply Input Bias Current (+IN, -IN) Input Bias Current (REF, FB) Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current
40 -60/+55 -240 10 12.6 11.6 0.85 1 +VS - 1.5 +VS - 2.5 -30 -50 12.5 100 0.5 2.25
40 -60/+55 -240 10 12.6 11.6 0.85 1
10.8 36 0.68
10.8 36 0.68
V mA A/C mA mA V V A A k k s
PD PIN VIH VIL IIH IIL Input Resistance Enable Time
+VS - 1.5 PD = Min VIH PD = Max VIL PD +VS - 3 V PD +VS - 2 V
+VS - 2.5 -30 -50 12.5 100 0.5
Specifications subject to change without notice.
-2-
REV. 0
AD8129/AD8130
(AD8129 G = 10, AD8130 G = 1, TA = 25 C, VS = unless otherwise noted. TMIN to TMAX = -40 C to +85 C, unless otherwise noted.)
Model Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Time Output Overdrive Recovery Conditions VOUT 0.3 V p-p VOUT = 2 V p-p VOUT 0.3 V p-p, SOIC/SOIC VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT 1 V p-p, 10% to 90% Min 175 170 935 AD8129A Typ 200 195 50/70 1070 20 1.7 40 -71/-84 -65/-74 -65/-82 -59/-70 -67 25 4.6 1 1.4 0.3 0.1 92 80 105 70 93 10.3 0.5 0.75 1 4 3 4 0.8 20 87 250 0.2 2 -88 -92 0.25 0.5 2.5 0.08 0.2 10.8 40 -60/+55 -240 10 2.25 13 43 0.73 12.6 13.9 0.9 1.1 +VS - 1.5 +VS - 2.5 -30 -50 3 100 0.5 3 100 0.5 +VS - 2.5 -30 -50 2.25 13 43 0.73 88 80
12 V SPECIFICATIONS
12 V, REF = 0 V, PD VIH, RL = 1 k , CL = 2 pF,
AD8130A Typ 290 175 110 1100 20 1.4 40 -79/-86 -74/-81 -74/-80 -74/-74 -70 26 13 1 1.4 0.13 0.2 105 70 80 10.5 2.5 2.8 6 4 3 4 0.15 10 73 200 0.4 10 -77 -88 0.25 0.5 2.5 0.08 0.2 10.8 40 -60/+55 -240 10 12.6 13.9 0.9 1.1
Max
Min 250 150 960
Max
Unit MHz MHz MHz V/s ns ns ns dBc dBc dBc dBc dBc dBm nV/Hz pA/Hz pA/Hz % Degrees dB dB dB dB V V V M M pF pF % ppm/C dB ppm mV V/C mV dB dB A A nA/C A nA/C V mA mA A/C pF V mA A/C mA mA V V A A k k s
NOISE/DISTORTION Second Harmonic/Third Harmonic VOUT = 1 V p-p, 5 MHz VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz IMD VOUT = 2 V p-p, 10 MHz Output IP3 VOUT = 2 V p-p, 10 MHz Input Voltage Noise (RTI) f 10 kHz Input Current Noise (+IN, -IN) f 100 kHz Input Current Noise (REF, FB) f 100 kHz Differential Gain Error AD8130, G = 2, NTSC 200 IRE, R L 150 Differential Phase Error AD8130, G = 2, NTSC 200 IRE, R L 150 INPUT CHARACTERISTICS Common-Mode Rejection Ratio DC to 100 kHz, V CM = 10 V VCM = 1 V p-p @ 2 MHz VCM = 1 V p-p @ 10 MHz VCM = 4 V p-p @ 1 kHz, VOUT = 0.5 V dc V+IN - V-IN = 0 V Differential Common-Mode Differential Common-Mode VOUT = 1 V, RL 150 TMIN to TMAX VOUT = 1 V VOUT = 1 V TMIN to TMAX TMIN to TMAX +VS = +12 V, -VS = -11.0 V to -13.0 V -VS = -12 V, +V S = +11.0 V to +13.0 V TMIN to TMAX (+IN, -IN, REF, FB) (+IN, -IN, REF, FB) TMIN to TMAX RLOAD = 700 To Common TMIN to TMAX PD VIL, In Power-Down Mode Total Supply Voltage TMIN to TMAX PD VIL PD VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Enable Time Specifications subject to change without notice. +VS - 1.5 PD = Min V IH PD = Max V IL PD +VS - 3 V PD +VS - 2 V
CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage
0.6
0.85
2.3
3.3
1.8
0.6
0.8 1.4 -82 -84 2 3.5 0.4
1.8 3.5 -70 -70 2 3.5 0.4
Input Offset Voltage vs. Supply Input Bias Current (+IN, -IN) Input Bias Current (REF, FB) Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current
REV. 0
-3-
AD8129/AD8130-SPECIFICATIONS
5 V SPECIFICATIONS
Model Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Rise and Fall Time Output Overdrive Recovery
(AD8129 G = 10, AD8130 G = 1, TA = 25 C, +VS = 5 V, -VS = 0 V, REF = 2.5 V, PD VIH, RL = 1 k , CL = 2 pF unless otherwise noted. TMIN to TMAX = -40 C to +85 C, unless otherwise noted.)
Conditions VOUT 0.3 V p-p VOUT = 1 V p-p VOUT 0.3 V p-p, SOIC/SOIC VOUT = 2 V p-p, 25% to 75% VOUT = 2 V p-p, 0.1% VOUT 1 V p-p, 10% to 90% Min 160 160 810 AD8129A Typ 185 185 25/40 930 20 1.8 20 -68/-75 -62/-64 -63/-70 -56/-58 -67 25 4.5 1 1.4 0.3 0.1 86 80 96 70 80 1.25 to 3.7 0.5 0.75 1 4 3 4 0.25 20 86 250 0.2 2 -88 -100 0.5 1 5 0.08 0.2 1.1 35 -60/+55 -240 10 2.25 9.9 33 0.65 12.6 10.6 0.85 1 +VS - 1.5 +VS - 2.5 -30 -50 12.5 100 0.5 12.5 100 0.5 2.25 9.9 33 0.65 86 80 Max Min 220 180 810 AD8130A Typ 250 205 25 930 20 1.5 30 -72/-79 -65/-71 -60/-62 -68/-68 -70 26 12.3 1 1.4 0.13 0.15 96 70 72 1.25 to 3.8 2.5 2.8 3.3 6 4 3 4 0.1 20 71 200 0.4 10 -74 -90 0.5 1 5 0.08 0.2 1.1 35 -60/+55 -240 10 12.6 10.6 0.85 1 0.6 Max Unit MHz MHz MHz V/s ns ns ns dBc dBc dBc dBc dBc dBm nV/Hz pA/Hz pA/Hz % Degrees dB dB dB dB V V V M M pF pF % ppm/C dB ppm mV V/C mV dB dB A A nA/C A nA/C V mA mA A/C pF V mA A/C mA mA
NOISE/DISTORTION Second Harmonic/Third Harmonic VOUT = 1 V p-p, 5 MHz VOUT = 2 V p-p, 5 MHz VOUT = 1 V p-p, 10 MHz VOUT = 2 V p-p, 10 MHz IMD VOUT = 2 V p-p, 10 MHz Output IP3 VOUT = 2 V p-p, 10 MHz Input Voltage Noise (RTI) f 10 kHz Input Current Noise (+IN, -IN) f 100 kHz Input Current Noise (REF, FB) f 100 kHz Differential Gain Error AD8130, G = 2, NTSC 100 IRE, R L 150 Differential Phase Error AD8130, G = 2, NTSC 100 IRE, R L 150 INPUT CHARACTERISTICS Common-Mode Rejection Ratio DC to 100 kHz, V CM = 1.5 V to 3.5 V VCM = 1 V p-p @ 1 MHz VCM = 1 V p-p @ 10 MHz VCM = 1 V p-p @ 1 kHz, VOUT = 0.5 V dc V+IN - V-IN = 0 V Differential Common-Mode Differential Common-Mode VOUT = 1 V, RL 150 TMIN to TMAX VOUT = 1 V VOUT = 1 V TMIN to TMAX TMIN to TMAX +VS = 5 V, -VS = -0.5 V to +0.5 V -VS = 0 V, +VS = +4.5 V to +5.5 V TMIN to TMAX (+IN, -IN, REF, FB) (+IN, -IN, REF, FB) TMIN to TMAX RLOAD 150 To Common TMIN to TMAX PD VIL, In Power-Down Mode Total Supply Voltage TMIN to TMAX PD VIL PD VIL, TMIN to TMAX PD PIN VIH VIL IIH IIL Input Resistance Enable Time Specifications subject to change without notice. +VS - 1.5 PD = Min VIH PD = Max VIL PD +VS - 3 V PD +VS - 2 V
CMRR with VOUT = 1 V p-p Common-Mode Voltage Range Differential Operating Range Differential Clipping Level Resistance Capacitance DC PERFORMANCE Closed-Loop Gain Error Open-Loop Gain Gain Nonlinearity Input Offset Voltage
0.6
0.85
2.3
1.25
0.8 1.4 -80 -86 2 3.5 0.4
1.8 3.5 -70 -76 2 3.5 0.4
Input Offset Voltage vs. Supply Input Bias Current (+IN, -IN) Input Bias Current (REF, FB) Input Offset Current OUTPUT PERFORMANCE Voltage Swing Output Current Short Circuit Current Output Impedance POWER SUPPLY Operating Voltage Range Quiescent Supply Current
3.9
3.9
V +VS - 2.5 V -30 A -50 A k k s
-4-
REV. 0
AD8129/AD8130
ABSOLUTE MAXIMUM RATINGS 1, 2
MAXIMUM POWER DISSIPATION - Watts
2.0 TJ (MAX) = 150 C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.4 V Power Dissipation . . . . . . . . . . . . . . . . . . . . . Refer to Figure 3 Input Voltage (Any Input) . . . . . . . -VS - 0.3 V to +VS + 0.3 V Differential Input Voltage (AD8129)3 VS 11.5 V . . . 0.5 V Differential Input Voltage (AD8129)3 VS < 11.5 V . . . 6.2 V Differential Input Voltage (AD8130) . . . . . . . . . . . . . . 8.4 V Storage Temperature . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . . 300C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other condition s above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Thermal Resistance measured on SEMI standard 4-layer board. 8-Lead SOIC: JA= 121C/W; 8-Lead Micro_SO: JA = 142C/W 3 Refer to Applications section, Extreme Operating Condition, and Power Dissipation.
1.5
8-LEAD SOIC PACKAGE
1.0 8-LEAD MICRO_SO 0.5
0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE - C
80 90
Figure 3. Maximum Power Dissipation vs. Temperature
CONNECTION DIAGRAM (Top View) SO-8 (R) and Micro_SO-8 (RM)
+IN 1 -VS 2 PD 3 REF 4
AD8129/ AD8130
8 -IN 7 +VS 6 OUT 5 FB
+
ORDERING GUIDE
Model AD8129AR AD8129AR-REEL1 AD8129AR-REEL72 AD8129ARM AD8129ARM-REEL3 AD8129ARM-REEL72 AD8129-EVAL AD8130AR AD8130AR-REEL1 AD8130AR-REEL72 AD8130ARM AD8130ARM-REEL3 AD8130ARM-REEL72 AD8130-EVAL
NOTES 1 13" Reel of 2500 each. 2 7" Reel of 1000 each. 3 13" Reel of 3000 each.
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead Micro_SO 8-Lead Micro_SO 8-Lead Micro_SO Evaluation Board with SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC 8-Lead Micro_SO 8-Lead Micro_SO 8-Lead Micro_SO Evaluation Board with SOIC
Package Option SO-8 13" Tape and Reel 7" Tape and Reel RM-8 13" Tape and Reel 7" Tape and Reel SO-8 13" Tape and Reel 7" Tape and Reel RM-8 13" Tape and Reel 7" Tape and Reel
Branding Information
HQA HQA HQA
HPA HPA HPA
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8129/AD8130 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
-5-
AD8129/AD8130 AD8130 Frequency Response Characteristics
(G = 1, RL = 1 k , CL = 2 pF, VOUT = 0.3 V p-p, TA = 25 C, unless otherwise noted.)
3 2 1 0 GAIN - dB -1 -2 -3 -4 -5 -6 -7 1 10 FREQUENCY - MHz 100 400 GAIN - dB VS = 5V VS = 12V VOUT = 0.3V p-p VS = 2.5V 2 1 0 GAIN - dB -1 -2 -3 -4 -5 -6 -7 1 10 FREQUENCY - MHz 100 300 VS = 5V VS = 12V 3 VOUT = 1V p-p VS = 2.5V 3 2 1 0 -1 -2 -3 -4 -5 -6 -7 1 10 FREQUENCY - MHz 100 300 VS = 5V VS = 12V VOUT = 2V p-p VS = 2.5V
TPC 1. AD8130 Frequency Response vs. Supply, VOUT = 0.3 V p-p
TPC 2. AD8130 Frequency Response vs. Supply, VOUT = 1 V p-p
TPC 3. AD8130 Frequency Response vs. Supply, VOUT = 2 V p-p
6 5 4 3 VS = 5V CL = 20pF CL = 10pF CL = 5pF
0.7 0.6 0.5 0.4 GAIN - dB 0.3 0.2 0.1 0.0 -0.1 -0.2 VS = 12V VS = 5V GAIN - dB RL = 1k VS = 2.5V
0.5 0.4 0.3 0.2 0.1 0.0 VS = -0.2 -0.3 -0.4 -0.5 1 10 FREQUENCY - MHz 100 300 1 10 FREQUENCY - MHz 100 300 12V VS = 5V RL = 150 VS = 2.5V
GAIN - dB
2 1 0 -1 -2 -3 -4 1 10 FREQUENCY - MHz 100 300 CL = 2pF
-0.1
-0.3
TPC 4. AD8130 Frequency Response vs. Load Capacitance
TPC 5. AD8130 Fine Scale Response vs. Supply, RL = 1 k
TPC 6. AD8130 Fine Scale Response vs. Supply, RL = 150
3 2 1 0 GAIN - dB GAIN - dB -1 -2 -3 -4 -5 -6 -7 1 10 FREQUENCY - MHz 100 400 VS = VS = 5V 12V RL = 150 VS = 2.5V
3
G=2 2 VOUT = 0.3V p-p 1 0
GAIN - dB
3 VS = 2.5V 1 0
G=2 2 VOUT = 2V p-p VS = 2.5V
-1 -2 -3 -4 -5 -6 -7 1
VS = VS =
5V 12V
-1 -2 -3 -4 -5 -6
VS = VS =
5V 12V
10 FREQUENCY - MHz
100
300
-7
1
10 FREQUENCY - MHz
100
300
TPC 7. AD8130 Frequency Response vs. Supply, RL = 150
TPC 8. AD8130 Frequency Response vs. Supply, G = 2, VOUT = 0.3 V p-p
TPC 9. AD8130 Frequency Response vs. Supply, G = 2, VOUT = 2 V p-p
-6-
REV. 0
AD8129/AD8130
3 2 1 0
GAIN - dB
0.3 0.3 G=2 RL = 1k VS = 2.5V 0.2 0.1 0 G=2 RL = 150 VS = 2.5V
RF = RG = 1k RF = RG = 750
0.2 0.1 0
GAIN - dB
-1 -2 -3 -4 -5 -6 -7 1
GAIN - dB
RF = RG = 499 RF = RG = 250
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7
VS =
5V
VS = VS =
5V 12V
VS =
12V
G=2 VS = 5V
10 FREQUENCY - MHz
100
300
-0.7 1 10 FREQUENCY - MHz 100
1
10 FREQUENCY - MHz
100
TPC 10. AD8130 Frequency Response for Various RF /RG
TPC 11. AD8130 Fine Scale Response vs. Supply, G = 2, RL = 1 k
TPC 12. AD8130 Fine Scale Response vs. Supply, G = 2, RL = 150
3 2 1 0
GAIN - dB GAIN - dB
0.3 G=2 RL = 150 VS = VS = VS = 5V 12V 2.5V 0.2 0.1 0
GAIN - dB
VOUT = 2V p-p VS = 2.5V VS = 5V
3 2 1 0
VOUT = 2V p-p
-1 -2 -3 -4 -5 -6 -7 1
-0.1 -0.2 -0.3 VS = 2.5V
VS =
12V
-1 -2 -3 -4 -5 VS = VS = 5V, VS = 12V 12V 2.5V
G=5
G=5 -0.4 -0.5 -0.6 10 FREQUENCY - MHz 100 300 -0.7 0.1 G = 10 1 FREQUENCY - MHz 10 30 VS = 5V, 12V
-6 -7 0.1
G = 10
10 1 FREQUENCY - MHz
100
TPC 13. AD8130 Frequency Response vs. Supply, G = 2, RL = 150
TPC 14. AD8130 Fine Scale Response vs. Supply, G = 5, G = 10, VOUT = 2 V p-p
TPC 15. AD8130 Frequency Response vs. Supply, G = 5, G = 10, VOUT = 2 V p-p
3 RL = 150 2
OUTPUT VOLTAGE - dBV
12 6
0dB = 1V RMS
1 50 8 6 4 5 RG RF
TEK P6245 FET PROBE
1 0
GAIN - dB
VS =
5V,
12V
0 -6 -12 -18 -24 -30 -36 -42 VS = 5V 100 FREQUENCY - MHz 400
RL
CL
-1 G = 10 -2 -3 -4 -5 -6 -7 0.1 10 1 FREQUENCY - MHz 100 VS = VS = 5V, 2.5V 12V G=5
G 1 2 5 10
RF 0 499 8.06k 4.99k
RG - 499 2k 549
-48 10
TPC 16. AD8130 Frequency Response vs. Supply, G = 5, G = 10, RL = 150
TPC 17. AD8130 Frequency Response for Various Output Levels
TPC 18. AD8130 Basic Frequency Response Test Circuit
REV. 0
-7-
AD8129/AD8130 AD8129 Frequency Response Characteristics
(G = 10, RL = 1 k , CL = 2 pF, VOUT = 0.3 V p-p, TA = 25 C, unless otherwise noted.)
3 2 1 0 VOUT = 0.3V p-p VS = 2.5V VS = 5V 3 2 1 0 VOUT = 1V p-p VS = 2.5V VS = 5V 2 1 0 3 VOUT = 2V p-p VS = 2.5V
GAIN - dB
GAIN - dB
GAIN - dB
-1 -2 -3 -4 -5 -6 -7 1
VS =
12V
-1 -2 -3 -4 -5 -6 -7
VS =
12V
-1 -2 -3 -4 -5 -6 -7
VS =
5V 12V
VS =
10 FREQUENCY - MHz
100
300
1
10 100 FREQUENCY - MHz
300
1
10 FREQUENCY - MHz
100
300
TPC 19. AD8129 Frequency Response vs. Supply, VOUT = 0.3 V p-p
TPC 20. AD8129 Frequency Response vs. Supply, VOUT = 1 V p-p
TPC 21. AD8129 Frequency Response vs. Supply, VOUT = 2 V p-p
4 3 2 1
GAIN - dB
VS =
5V
CL = 20pF CL = 10pF CL = 5pF CL = 2pF
GAIN - dB
0.5 RL = 1k 0.4 0.3 0.2 VS = VS = 2.5V
0.3 RL = 150 0.2 0.1 0 VS = 2.5V
5V
GAIN - dB
0 -1 -2 -3 -4 -5 -6 1 10 FREQUENCY - MHz 100 300
0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 1 10 100 FREQUENCY - MHz 300 VS = 12V
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 1
VS =
5V VS = 12V
10 FREQUENCY - MHz
100
300
TPC 22. AD8129 Frequency Response vs. Load Capacitance
TPC 23. AD8129 Fine Scale Response vs. Supply, RL = 1 k
TPC 24. AD8129 Fine Scale Response vs. Supply, RL = 150
3 2 1 0 RL = 150 VS = 2.5V
3 2 1 0 VS = 5V, 12V G = 20 VOUT = 0.3V p-p
3 2 1 0 VS = 5V, 12V G = 20 VOUT = 2V p-p
GAIN - dB
GAIN - dB
GAIN - dB
-1 -2 -3 -4 -5 -6 -7 10
VS =
5V VS = 12V
-1 -2 -3 -4 -5 -6 -7 VS =
-1 -2 -3 -4 VS = 2.5V
2.5V -5 -6 -7
100 FREQUENCY - MHz
300
1
10 FREQUENCY - MHz
100
300
1
10 FREQUENCY - MHz
100
300
TPC 25. AD8129 Frequency Response vs. Supply, RL = 150
TPC 26. AD8129 Frequency Response vs. Supply, G = 20, VOUT = 0.3 V p-p
TPC 27. AD8129 Frequency Response vs. Supply, G = 20, VOUT = 2 V p-p
-8-
REV. 0
AD8129/AD8130
0.8 0.6 0.4 499 /54.9 0.2 SOIC G = 10 VS = 5V 2k /221 909 /100
0.2 0.1 0 VS = -0.1
GAIN - dB
G = 20 RL = 1k 5V
0.3 0.2 0.1 0 G = 20 RL = 150 VS = 5V, 12V
GAIN - dB
GAIN - dB
2.5V
0 -0.2 0.2 0 -0.2 -0.4 -0.6 1
-0.2 -0.3 -0.4 -0.5 VS = 12V
-0.1 -0.2 -0.3 -0.4 -0.5 -0.6 VS = 2.5V
499 /54.9 909 /100 SOIC 2k /221
VS =
-0.6 -0.7 -0.8
10 FREQUENCY - MHz
100
300
1
10 FREQUENCY - MHz
30
-0.7 0.1 1 FREQUENCY - MHz 10 30
TPC 28. AD8129 Fine Scale Response vs. SOIC and SOIC for Various RF /RG
TPC 29. AD8129 Fine Scale Response vs. Supply
TPC 30. AD8129 Fine Scale Response vs. Supply
3 2 1 0 G = 20 RL = 150
0.2 VOUT = 2V p-p 0.1 0 -0.1 G = 100
GAIN - dB
VS = 5V, 12V
3 2 VOUT = 2V p-p
VS =
12V
1 0
G = 50
GAIN - dB
GAIN - dB
-1 -2 -3 -4 -5 -6 -7 1 VS = 2.5V
-0.2 -0.3 -0.4 -0.5 -0.6 -0.7
-1 -2 -3 -4
G = 100
G = 50
VS =
2.5V VS = 5V
VS =
2.5V 5V 12V
VS =
12V
-5 -6
VS = VS =
10 FREQUENCY - MHz
100
300
-0.8 0.1
1 FREQUENCY - MHz
10
-7 0.1
1 10 FREQUENCY - MHz
50
TPC 31. AD8129 Frequency Response vs. Supply, G = 20, RL = 150
TPC 32. AD8129 Fine Scale Response vs. Supply, G = 50, G = 100, VOUT = 2 V p-p
12 0dB = 1V RMS 6
OUTPUT VOLTAGE - dBV
TPC 33. AD8129 Frequency Response vs. Supply, G = 50, G = 100, VOUT = 2 V p-p
3 2 1 0
GAIN - dB
RL = 150
1 50 8 6 4 5 RG RF
TEK P6245 FET PROBE
0 -6 -12 -18 -24 -30
-1 G = 100 -2 -3 -4 -5 -6 -7 0.1 1 10 FREQUENCY - MHz VS = 2.5V 5V 12V
RL
CL
G = 50
VS = VS =
G
-36 -42 50 -48 10 VS = 5V 100 FREQUENCY - MHz 400
RF 2k 2k 2k 2k
RG 221 105 41.2 20
10 20 50 100
TPC 34. AD8129 Frequency Response vs. Supply, G = 50, G = 100, RL = 150
TPC 35. AD8129 Frequency Response for Various Output Levels
TPC 36. AD8129 Basic Frequency Response Test Circuit
REV. 0
-9-
AD8129/AD8130 AD8130 Harmonic Distortion Characteristics
(RL = 1 k , CL = 2 pF, TA = 25 C, unless otherwise noted.)
-60 VOUT = 1V p-p -66 VS = 12V
-54 VOUT = 2V p-p -60 G=1 VS = 5V
HD2 - dBc
-55 fC = 5MHz -61 VS = VS = 12V 5V
-67
HD2 - dBc
HD2 - dBc
-72
-66
G=1 -73
-78
G=1 VS = 12V VS = 5V
-72
-79 -78
G=2
VS = G=2 VS =
12V 5V
-84
VS =
12V G=2 VS = 5V
G=1 VS = 12V
-85
-90 1 10 FREQUENCY - MHz 40
-84 1
10 FREQUENCY - MHz
40
-91 0.5
1 VOUT - V p-p
10
TPC 37. AD8130 Second Harmonic Distortion vs. Frequency
TPC 38. AD8130 Second Harmonic Distortion vs. Frequency
TPC 39. AD8130 Second Harmonic Distortion vs. Output Voltage
-51 VOUT = 1V p-p -57 -63 G=1 VS = 5V G=1 VS = 12V
-45 -51 -57
-46
VOUT = 2V p-p G = 2, VS = G = 2, VS = 12V 5V
fC = 5MHz
-52 -58
HD3 - dBc
VS = VS =
12V 5V
HD3 - dBc
HD3 - dBc
-69 -75 -81 -87 -93 -99 1 G=2 VS = 12V VS = 5V
-63 -69 VS = -75 -81 -87 G=2 -93 VS = G=1 5V 12V
-64 -70 G=1 -76 -82 -88 -94 0.5 VS = VS = 5V 12V G=2
G=1
10 FREQUENCY - MHz
40
1
10 FREQUENCY - MHz
40
1 VOUT - V p-p
10
TPC 40. AD8130 Third Harmonic Distortion vs. Frequency
TPC 41. AD8130 Third Harmonic Distortion vs. Frequency
TPC 42. AD8130 Third Harmonic Distortion vs. Output Voltage
-43 VS = -49 2.5V
-42 -48 -54
-46
VS = 2.5V
-52 -58
HD - dBc
VOUT = 2V p-p
VS = 2.5V fC = 5MHz
G = 2, HD3 G = 1, HD3
G=1 -55
HD2 - dBc
-60
HD3 - dBc
VOUT = 2V p-p G=2
-64 -70 -76 -82
G = 1, HD2 G = 2, HD2 G = 2, HD2
-66 -72
-61
G=2 G=1
-67
-78 -84 G=1 G=2
-73
G = 2, HD3 -88
VOUT = 1V p-p
G=1 G=2
VOUT = 1V p-p 10 FREQUENCY - MHz 40
-90 -96
-79 1
-94
1 10 FREQUENCY - MHz 40
0
0.5
1.0 1.5 2.0 VOUT - V p-p
2.5
3.0
TPC 43. AD8130 Second Harmonic Distortion vs. Frequency
TPC 44. AD8130 Third Harmonic Distortion vs. Frequency
TPC 45. AD8130 Harmonic Distortion vs. Output Voltage
-10-
REV. 0
AD8129/AD8130 AD8129 Harmonic Distortion Characteristics
(RL = 1 k , CL = 2 pF, TA = 25 C, unless otherwise noted.)
-51 -57 VOUT = 1V p-p
-42 -48 -54 G = 10 VOUT = 2V p-p
-50 fC = 5MHz -56
-63
HD2 - dBc
HD2 - dBc
-60 -66 -72 -78 -84
-69 G = 10, VS = 5V G = 20, VS = 12V G = 20, VS = 5V 1 10 FREQUENCY - MHz 40
G = 20, VS = 12V
G = 20
HD2 - dBc
G = 10, VS = 12V
G = 10, VS = 12V
-62 G = 10, VS = 12V -68 -74 G = 10, VS = 5V G = 20, VS = 5V G = 20, VS = 12V
-75
-81
G = 10, VS = 5V G = 20, VS = 5V 1 10 FREQUENCY - MHz 40
-80
-87
-86 0.5
1 VOUT - V p-p
10
TPC 46. AD8129 Second Harmonic Distortion vs. Frequency
TPC 47. AD8129 Second Harmonic Distortion vs. Frequency
TPC 48. AD8129 Second Harmonic Distortion vs. Output Voltage
-54 VOUT = 1V p-p -60 -66
HD3 - dBc
-45
G = 10, VS = 5V G = 10, VS = 12V
HD3 - dBc
VOUT = 2V p-p -51 -57 -63 -69 -75 -81 -87 G = 10, VS = 5V G = 10, VS = 12V
-48
G = 10, VS = 5V
fC = 5MHz -54 -60
HD3 - dBc
G = 10, VS = 12V G = 10, VS = 5V
G = 10, VS = 12V
-72 -78 -84 -90 -96 1 10 FREQUENCY - MHz 40
-66 -72 -78 -84 -90 -96 0.5 G = 20, VS = 5V G = 20, VS = 12V 1 VOUT - V p-p 10
G = 20, VS = 5V
G = 20, VS = 5V G = 20, VS = 12V 40
G = 20, VS = 12V
1
10 FREQUENCY - MHz
TPC 49. AD8129 Third Harmonic Distortion vs. Frequency
TPC 50. AD8129 Third Harmonic Distortion vs. Frequency
TPC 51. AD8129 Third Harmonic Distortion vs. Output Voltage
-44 VS = -50 2.5V VOUT = 2V p-p
-42 VS = -48 -54 2.5V VOUT = 2V p-p
-50 -56 VS = 2.5V fC = 5MHz
-56
HD2 - dBc
HD3 - dBc
-62 G = 20 -68 VOUT = 1V p-p
-66 VOUT = 1V p-p -72 G = 10 -78
HD - dBc
-60
-62
G = 20
G = 20 HD3 G = 10 HD2 G = 10 HD3
G = 20 HD2
-68
-74
-74 G = 10 -80 1 10 FREQUENCY - MHz 40
-84 -90 1 10 FREQUENCY - MHz 40
-80
-86
0
0.5
1.0 1.5 2.0 VOUT - V p-p
2.5
3.0
TPC 52. AD8129 Second Harmonic Distortion vs. Frequency
TPC 53. AD8129 Third Harmonic Distortion vs. Frequency
TPC 54. AD8129 Harmonic Distortion vs. Output Voltage
REV. 0
-11-
AD8129/AD8130
-39 -45 -51 DISTORTION - dBc -57 -63 -69 -75 -81 -87 -5 HD2 G=1 VOUT = 2V p-p VS = 5V RL = 1k fC = 5MHz -61 G=1 fC = 5MHz
-50
VOUT = 1V p-p HD2 VS = 2.5V HD2 5V, 12V
-67
DISTORTION - dBc
G=1 fC = 5MHz -56
DISTORTION - dBc
VOUT = 2V p-p
-73 -79 VS = HD3 VS = 5V -85 HD3 VS = 12V HD3 VS = 2.5V 1k RL -
-62
HD2 VS = 2.5V
-68 VS = -74 HD3 VS = 2.5V VS = RL -
HD2 5V, 12V
-91 HD3 -97 100
-80
HD3 5V, 12V 1k
-4
-3 -2 -1 0 1 VCM - V
2
3
4
5
-86 100
TPC 55. AD8130 Harmonic Distortion vs. Common-Mode Voltage
TPC 56. AD8130 Harmonic Distortion vs. Load Resistance
TPC 57. AD8130 Harmonic Distortion vs. Load Resistance
-36 -42 G = 10 VOUT = 2V p-p VS = 5V RL = 1k fC = 5MHz
-48 -54
DISTORTION - dBc
G = 10 fC = 5MHz
-44
VOUT = 1V p-p
-50
G = 10 fC = 5MHz
VOUT = 2V p-p VS = VS = VS = 2.5V 12V 5V
DISTORTION - dBc
HD2
DISTORTION - dBc
-48 -54 -60 -66 -72 -78 -5
-60 -66 -72 -78 HD3 -84 VS = 2.5V -90 100 VS = VS =
VS = VS = VS =
2.5V 12V 5V
-56
12V 5V
-62 VS = -68 HD3 VS = -74 VS = 5V 1k RL - 12V 2.5V
HD2 HD3 -4 -3 -2 -1 0 1 2 3 4 5
1k RL -
-80 100
VCM - V
TPC 58. AD8129 Harmonic Distortion vs. Common-Mode Voltage
TPC 59. AD8129 Harmonic Distortion vs. Load Resistance
TPC 60. AD8129 Harmonic Distortion vs. Load Resistance
VCM
100
100
CURRENT NOISE - pA/ Hz
200 1:2 RL CL RG RF G MINI CIRCUITS: # T4 - 6T, fC 10MHz # TC4 - 1W, fC 10MHz 1 2 10 20 RF 0 499 2k 2k RG - 499 221 105
10
VOLTAGE NOISE - nV/ Hz
AD8130 10 AD8129
1.0
0.1 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M
1.0 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M
TPC 61. AD8129/AD8130 Basic Distortion Test Circuit, VCM = 0 V Unless Otherwise Noted
TPC 62. AD8129/AD8130 Input Current Noise vs. Frequency
TPC 63. AD8129/AD8130 Input Voltage Noise vs. Frequency
-12-
REV. 0
AD8129/AD8130
-30
COMMON-MODE REJECTION - dB
POWER SUPPLY REJECTION - dB 0 0
-50 -60 -70 -80 -90 -100 -110 -120 10k VS = 5V, 12V VS = 2.5V
-20 -30 -40 -50 -60 -70 -80 -90 VS = 1k 10k VS = 5V 2.5V 10M 100M VS = 12V
POWER SUPPLY REJECTION - dB
-40
-10
-10 -20 -30 -40 -50 -60 -70 -80 -90 VS = 1k 5V 10k VS = 12V 10M 100M VS = 2.5V
-100
100k
1M 10M FREQUENCY - Hz
100M
-100 100k 1M FREQUENCY - Hz
100k 1M FREQUENCY - Hz
TPC 64. AD8130 Common-Mode Rejection vs. Frequency
TPC 65. AD8130 Positive Power Supply Rejection vs. Frequency
TPC 66. AD8130 Negative Power Supply Rejection vs. Frequency
-30
0 POWER SUPPLY REJECTION - dB
0
COMMON-MODE REJECTION - dB
POWER SUPPLY REJECTION - dB
-40 -50 -60 -70 -80 -90 -100 -110 -120 10k VS = 100k 5V, 12V VS = 2.5V
-10 -20 -30 -40 -50 -60 -70 -80 -90 VS = 1k 10k 5V 10M 100M 100k 1M FREQUENCY - Hz VS = 12V VS = 2.5V
-10 -20 -30 -40 -50 -60 -70 -80 V = S -90 VS = 12V VS = 10k 100k 2.5V 1M 10M 100M 5V
1M 10M FREQUENCY - Hz
100M
-100
-100 1k
FREQUENCY - Hz
TPC 67. AD8129 Common-Mode Rejection vs. Frequency
TPC 68. AD8129 Positive Power Supply Rejection vs. Frequency
TPC 69. AD8129 Negative Power Supply Rejection vs. Frequency
80 70 180
90 80
PHASE MARGIN - Degrees
OPEN-LOOP GAIN - dB
100
180
PHASE MARGIN - Degrees
OPEN-LOOP GAIN - dB
60 50 40 30 20 10 0
1k VIN
+ - + -
GAIN 135
70 60 50 40
GAIN 135
10
OUTPUT IMPEDANCE -
VS = 1
5V
PHASE
VOUT 1k 1k 2pF
90
VOUT
PHASE 90
2pF
AD8130, G = 1 100m
30
1k
45 M = 58
20 10 0
100 VIN
1k
45 M = 56
10m AD8129, G = 10
-10 1k 10k 100k 1M 10M FREQUENCY - Hz
0 100M 300M
1k
10k
100k 1M 10M FREQUENCY - Hz
0 100M 300M
1m 1k
10k
100k 1M 10M FREQUENCY - Hz
100M
TPC 70. AD8130 Open Loop Gain and Phase vs. Frequency
TPC 71. AD8129 Open Loop Gain and Phase vs. Frequency
TPC 72. Closed-Loop Output Impedance vs. Frequency
REV. 0
-13-
AD8129/AD8130 AD8130 Transient Response Characteristics
(G = 1, RL = 1 k , CL = 2 pF, VS = 5 V, TA = 25 C, unless otherwise noted.)
VOUT = 1V p-p VS = 5V VOUT = 1V p-p VS = 12V
VOUT = 1V p-p VS = 2.5V
250mV
5.00ns
250mV
5.00ns
250mV
5.00ns
TPC 73. AD8130 Transient Response, VS = 2.5 V, VOUT = 1 V p-p
TPC 74. AD8130 Transient Response, VS = 5 V, VOUT = 1 V p-p
TPC 75. AD8130 Transient Response, VS = 12 V, VOUT = 1 V p-p
VS =
2.5V VS = 5V
VOUT = 0.2V p-p
VS =
2.5V VS = 5V
VOUT = 1V p-p CL = 5pF
VS =
2.5V VS = 5V
VOUT = 2V p-p CL = 5pF
VS =
12V
VS =
12V
VS =
12V
50mV
5.00ns
250mV
5.00ns
500mV
5.00ns
TPC 76. AD8130 Transient Response vs. Supply, VOUT = 0.2 V p-p
TPC 77. AD8130 Transient Response vs. Supply, VOUT = 1 V p-p, CL = 5 pF
TPC 78. AD8130 Transient Response vs. Supply, VOUT = 2 V p-p, CL = 5 pF
CL = 10pF CL = 5pF CL = 2pF
VOUT = 0.2Vp-p 2V p-p 1V p-p 0.5V p-p
4V p-p 2V p-p 1V p-p
50mV
10.0ns
500mV
5.00ns
1.00V
5.00ns
TPC 79. AD8130 Transient Response vs. Load Capacitance, VOUT = 0.2 V p-p
TPC 80. AD8130 Transient Response vs. Output Amplitude, VOUT = 0.5 V p-p, 1 V p-p, 2 V p-p
TPC 81. AD8130 Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p
-14-
REV. 0
AD8129/AD8130
VOUT = 1V p-p G=2 VS = 5V, CL = 10pF VOUT = 2V p-p G=2
VOUT = 8V p-p
VS = 5V
CL = 10pF
G=2 VS = 5V
VS =
5V, CL = 2pF
VS =
12V
CL = 2pF
250mV
5.00ns
500mV
5.00ns
2.00V
5.00ns
TPC 82. AD8130 Transient Response vs. Load Capacitance, VOUT = 1 V p-p, G=2
TPC 83. AD8130 Transient Response vs. Supply, VOUT = 2 V p-p, G = 2
TPC 84. AD8130 Transient Response vs. Load Capacitance, VOUT = 8 V p-p
VOUT = 10V p-p
VIN VOUT VOUT
G=2 VS = 12V
VIN 1.00V 5.00ns
1.00V
5.00ns
2.50V
5.00ns
TPC 85. AD8130 Transient Response with +3 V Common-Mode Input
TPC 86. AD8130 Transient Response with -3 V Common-Mode Input
TPC 87. AD8130 Transient Response, VOUT = 10 V p-p, G = 2, VS = 12 V
4V p-p 2V p-p
G=5 VS = 5V CL = 10pF
VOUT = 8V p-p
G=5 VS = 5V CL = 10pF
VOUT = 20V p-p
G=5 VS = 12V CL = 10pF
1V p-p
1.00V
10.0ns
2.00V
10.0ns
5.00V
10.0ns
TPC 88. AD8130 Transient Response vs. Output Amplitude
TPC 89. AD8130 Transient Response, VOUT = 8 V p-p, G = 5, VS = 5 V
TPC 90. AD8130 Transient Response, VOUT = 20 V p-p, G = 5, VS = 12 V
REV. 0
-15-
AD8129/AD8130 AD8129 Transient Response Characteristics
(G = 10, RF = 2 k , RG = 221
VS = 2.5V
, RL = 1 k , CL = 1 pF, VS =
VS = 5V
5 V, TA = 25 C, unless otherwise noted.)
VOUT = 1V p-p
VOUT = 1V p-p
VS =
12V
VOUT = 1V p-p
250mV
5.00ns
250mV
5.00ns
250mV
5.00ns
TPC 91. AD8129 Transient Response, VS = 2.5 V, VOUT = 1 V p-p
TPC 92. AD8129 Transient Response, VS = 5 V, VOUT = 1 V p-p
TPC 93. AD8129 Transient Response, VS = 12 V, VOUT = 1 V p-p
VS =
5V VS = 2.5V
VOUT = 0.4V p-p
VS =
5V VS =
2.5V
VOUT = 1V p-p CL = 5pF
VS =
2.5V VS =
5V
VOUT = 2V p-p CL = 5pF
VS =
12V
VS =
12V
VS =
12V
100mV
5.00ns
250mV
5.00ns
500mV
5.00ns
TPC 94. AD8129 Transient Response vs. Supply, VOUT = 0.4 V p-p
TPC 95. AD8129 Transient Response vs. Supply, VOUT = 1 V p-p, CL = 5 pF
TPC 96. AD8129 Transient Response vs. Supply, VOUT = 2 V p-p, CL = 5 pF
CL = 5pF CL = 10pF CL = 2pF
VOUT = 0.4V p-p
VO = 2V p-p VO = 1V p-p VO = 0.5V p-p
VO = 4V p-p VO = 2V p-p VO = 1V p-p
100mV
5.00ns
500mV
5.00ns
1.00V
5.00ns
TPC 97. AD8129 Transient Response vs. Load Capacitance, VOUT = 0.4 V p-p
TPC 98. AD8129 Transient Response vs. Output Amplitude, VOUT = 0.5 V p-p, 1 V p-p, 2 V p-p
TPC 99. AD8129 Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p
-16-
REV. 0
AD8129/AD8130
VOUT = 1V p-p G = 20 CL = 20pF VOUT = 2V p-p G = 20 CL = 20pF VOUT = 8V p-p G = 20 CL = 20pF
250mV
5.00ns
500mV
5.00ns
2.00V
5.00ns
TPC 100. AD8129 Transient Response, VOUT = 1 V p-p, VS = 2.5 V to 12 V
TPC 101. AD8129 Transient Response, VOUT = 2 V p-p, VS = 5 V
TPC 102. AD8129 Transient Response, VOUT = 8 V p-p, VS = 5 V
VOUT = 10V p-p
VIN
G = 20 VS = 12V CL = 20pF
VOUT
VOUT
VIN
1.00V 5.00ns
2.50V 5.00ns
TPC 103. AD8129 Transient Response with +3.5 V Common-Mode Input
TPC 104. AD8129 Transient Response with -3.5 V Common-Mode Input
TPC 105. AD8129 Transient Response, VOUT = 10 V p-p, G = 20
4V p-p 2V p-p
G = 50 VS = 5V CL = 20pF
VOUT = 8V p-p
G = 50 VS = 5V CL = 20pF
VOUT = 20V p-p
G = 50 VS = 12V CL = 10pF
1V p-p
1.00V
12.5ns
2.00V
12.5ns
5.00V
12.5ns
TPC 106. AD8129 Transient Response vs. Output Amplitude, VOUT = 1 V p-p, 2 V p-p, 4 V p-p
TPC 107. AD8129 Transient Response, VOUT = 8 V p-p, G = 50, VS = 5 V
TPC 108. AD8129 Transient Response, VOUT = 20 V p-p, G = 50, VS = 12 V
REV. 0
-17-
AD8129/AD8130
3.0
23 37
AD8130 DIFFERENTIAL INPUT - V
G = 10 VS = 10V
SUPPLY CURRENT - mA
20
SUPPLY CURRENT - mA
G=1 VS = 5V
2.0 VOUT = 100mV AC @ 1kHz 1.0 AD8129
31
17
25
0.0
14
19
-1.0 AD8130
-2.0
11 -5 -4 -3 -2 -1 0 1 2 3 DIFFERENTIAL INPUT - V 4 5 13 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0
DIFFERENTIAL INPUT - V
-3.0 -50 -35 -20 -5
10
25
40
55
70
85 100
TEMPERATURE - C
TPC 109. AD8130 DC Power Supply Current vs. Differential Input Voltage
TPC 110. AD8129 DC Power Supply Current vs. Differential Input Voltage
TPC 111. AD8129/AD8130 Input Differential Voltage Range vs. Temperature, 1% Gain Compression
GAIN NONLINEARITY - 0.08%/DIV
GAIN NONLINEARITY - 0.005%/DIV
G=1 VS = 5V RL = 1k
G=1 VS = 5V RL = 1k
4 3 2 VS = 5V
VOUT - V
0 0.5 1.0 1.5 2.0 2.5
1 0 -1 -2 -3 -4 -5 -4 -3 -2 -1 0 1 2 3 DIFFERENTIAL INPUT - V 4 5
-1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 OUTPUT VOLTAGE - V
-2.5 -2.0 -1.5 -1.0 -0.5
OUTPUT VOLTAGE - V
TPC 112. AD8130 Gain Nonlinearity, VOUT = 2 V p-p
TPC 113. AD8130 Gain Nonlinearity, VOUT = 5 V p-p
TPC 114. AD8130 Differential Input Clipping Level
8
GAIN NONLINEARITY - 0.005%/DIV
GAIN NONLINEARITY - 0.2%/DIV
OUTPUT VOLTAGE - V
G = 10 VS = 5V RL = 1k
G = 10 VS = 12V RL = 1k
6 VS = 4 2 0 -2 -4 -6 10V
-1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 OUTPUT VOLTAGE - V
1.0
-5
-4
-3
-2 -1 0 1 2 3 OUTPUT VOLTAGE - V
4
5
-8 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 DIFFERENTIAL INPUT - V
TPC 115. AD8129 Gain Nonlinearity, VOUT = 2 V p-p
TPC 116. AD8129 Gain Nonlinearity, VOUT = 10 V p-p
TPC 117. AD8129 Differential Input Clipping Level
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REV. 0
AD8129/AD8130
15 17 16 INPUT BIAS CURRENT - A 14 SUPPLY CURRENT - mA
0.60
40
INPUT OFFSET CURRENT - nA
SUPPLY CURRENT - mA
15 14 13 12 11 10 9 VS = 2.5V VS = 12V VS = 5V
IB 0.45 IOS 30
13
12
11
0.30
20
10 8 9 0 5 10 15 20 25 TOTAL SUPPLY VOLTAGE - V 30 7 -50 -35 -20 -5 10 25 40 55 70 TEMPERATURE - C 85 100
0.15 10 -50 -35 -20 -5 10 25 40 55 70 85 100 TEMPERATURE - C
TPC 118. Quiescent Power Supply Current vs. Total Supply Voltage
TPC 119. Quiescent Power Supply Current vs. Temperature
TPC 120. Input Bias Current and Input Offset Current vs. Temperature
4.00 3.75
INPUT COMMON-MODE - V
4.00 3.75
11.0 10.5 AD8130
3.50 3.25 3.00 2.75 2.50 2.25 2.00 1.75 1.50 1.25 AD8129 VS = 5V
AD8130
INPUT COMMON-MODE - V
INPUT COMMON-MODE - V
3.50 3.25 3.00 2.75 -3.00 -3.25 AD8129 -3.50 -3.75 VS = 5V
AD8130 AD8129 VOUT = 100mV AC AT 1kHz
10.0 9.5 9.0 8.5 -9.0 -9.5 -10.0 -10.5 AD8129 AD8130 VOUT = 100mV AC AT 1kHz VS = 12V AD8129
VOUT = 100mV AC AT 1kHz
AD8130
AD8129
AD8130
1.00 -50 -35 -20 -5 10 25 40 55 70 TEMPERATURE - C
85 100
-4.00 -50 -35 -20 -5 10 25 40 55 70 TEMPERATURE - C
85 100
-11.0 -50 -35 -20 -5 10 25 40 55 70 TEMPERATURE - C
85 100
TPC 121. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression
TPC 122. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression
TPC 123. Common-Mode Voltage Range vs. Temperature, Typical 1% Gain Compression
4.0 VS = 5V 3.5 OUTPUT VOLTAGE - V SOURCING 3.0 +100 C -40 C +25 C 2.0 SINKING 1.5 VOUT = 100mV AC AT 1kHz 1.0 0 5 10 15 20 25 30 OUTPUT CURRENT - mA 35 40 OUTPUT VOLTAGE - V
4.0
11
VS =
5V
10
VS =
12V
3.5 OUTPUT VOLTAGE - V
3.0 +100 C -40 C +25 C -3.0
9 +100 C -40 C +25 C -9
-3.5 VOUT = 100mV AC AT 1kHz -4.0 0 5 10 15 20 25 30 OUTPUT CURRENT - mA 35 40
-10 VOUT = 100mV AC AT 1kHz -11 0 5 10 15 20 25 30 OUTPUT CURRENT - mA 35 40
TPC 124. Output Voltage Range vs. Output Current, Typical 1% Gain Compression
TPC 125. Output Voltage Range vs. Output Current, Typical 1% Gain Compression
TPC 126. Output Voltage Range vs. Output Current, Typical 1% Gain Compression
REV. 0
-19-
AD8129/AD8130
THEORY OF OPERATION
The AD8129/AD8130 use an architecture called active feedback which differs from that of conventional op amps. The most obvious differentiating feature is the presence of two separate pairs of differential inputs compared to a conventional op amp's single pair. Typically for the active-feedback architecture, one of these input pairs is driven by a differential input signal, while the other is used for the feedback. This active stage in the feedback path is where the term "active feedback" is derived. The active feedback architecture offers several advantages over a conventional op amp in several types of applications. Among these are excellent common-mode rejection, wide input commonmode range and a pair of inputs that are high-impedance and totally balanced in a typical application. In addition, while an external feedback network establishes the gain response as in a conventional op amp, its separate path makes it totally independent of the signal input. This eliminates any interaction between the feedback and input circuits, which traditionally causes problems with CMRR in conventional differential-input op amp circuits. Another advantage is the ability to change the polarity of the gain merely by switching the differential inputs. A high inputimpedance inverting amplifier can be made. Besides a high input impedance, a unity-gain inverter with the AD8130 will have a noise gain of unity. This will produce lower output noise and higher bandwidth than op amps that have noise gain equal to 2 for a unity gain inverter. The two differential input stages of the AD8129/AD8130 are each transconductance stages that are well matched. These stages convert the respective differential input voltages to internal currents. The currents are then summed and converted to a voltage, which is buffered to drive the output. The compensation capacitor is in the summing circuit. When the feedback path is closed around the part, the output will drive the feedback input to that voltage which causes the internal currents to sum to zero. This occurs when the two differential inputs are equal and opposite; that is, their algebraic sum is zero. In a closed-loop application, a conventional op amp will have its differential input voltage driven to near zero under nontransient conditions. The AD8129/AD8130 generally will have differential input voltages at each of its input pairs, even under equilibrium conditions. As a practical consideration, it is necessary to internally limit the differential input voltage with a clamp circuit.
Thus, the input dynamic ranges are limited to about 2.5 V for the AD8130 and 0.5 V for the AD8129 (see Specification section for more detail). For this and other reasons, it is not recommended to reverse the input and feedback stages of the AD8129/AD8130, even though some apparently normal functionality might be observed under some conditions. A few simple circuits can illustrate how the active feedback architecture of the AD8129/AD8130 operates.
Op Amp Configuration
If only one of the input stages of the AD8129/AD8130 is used, it will function very much like a conventional op amp. (See Figure 4.) Classical inverting and noninverting op amps circuits can be created, and the basic governing equations will be the same as for a conventional op amp. The unused input pins form the second input and should be shorted together and tied to ground or some midsupply voltage when they are not used.
+V
0.1 F + PD +VS
10 F
VIN
+ -VS RF RG -V 0.1 F
VOUT
10 F
Figure 4. With both inputs grounded, the feedback stage functions like an op amp: VOUT = VIN (1 + RF/RG). NOTE: This circuit is provided to demonstrate device operation. It is not suggested to use this circuit in place of an op amp.
With the unused pair of inputs shorted, there is no differential voltage between them. This dictates that the differential input voltage of the used inputs will also be zero for closed-loop applications. Since this is the governing principle of conventional op amp circuits, an active feedback amplifier can function as a conventional op amp under these conditions. Note that this circuit is presented only for illustration purposes, to show the similarities of the active feedback architecture functionality to conventional op amp functionality. If it is desired to design a circuit that can be created from a conventional op amp, it is recommended to choose a conventional op amp whose specifications are better suited to that application. These op amp principles are the basis for offsetting the output as described in the Output Offset/Level Translator section.
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REV. 0
AD8129/AD8130
APPLICATIONS
Basic Gain Circuits Twisted-Pair Cable, Composite Video Receiver with Equalization Using an AD8130
The gain of the AD8129/AD8130 can be set with a pair of feedback resistors. The basic configuration is shown in Figure 5. The gain equation is the same as that of a conventional op amp: G = 1 + RF/RG. For unity gain applications using the AD8130, RF can be set to zero (short circuit), and RG can be removed. (See Figure 6.) The AD8129 is compensated to operate at gains of 10 and higher, so shorting the feedback path to obtain unity gain will cause oscillation.
+V
The AD8130 has excellent common-mode rejection at its inputs. This makes it an ideal candidate for a receiver for signals that are transmitted over long distances on twisted-pair cables. Category 5 type cables are now very common in office settings and are extensively used for data transmission. These same cables can also be used for the analog transmission of signals like video. These long cables will pick up noise from the environment they pass through. This noise will not favor one conductor over another, and will therefore be a common-mode signal. A receiver that rejects the common-mode signal on the cable can greatly enhance the signal-to-noise ratio performance of the link. The AD8130 is also very easy to use as a differential receiver, because the differential inputs and the feedback inputs are entirely separate. This means that there is no interaction of the feedback network and the termination network as there would be in conventional op amp-type receivers. Another issue to be dealt with on long cables is the attenuation of the signal at longer distances. This attenuation is a function of frequency and increases as roughly as the square root of frequency.
AD8129/ AD8130
VIN + PD +VS
0.1 F
10 F
+ -VS RF RG -V 0.1 F
VOUT
10 F
Figure 5. Basic Gain Circuit: VOUT = VIN (1 + RF/RG)
For good fidelity of video circuits, the overall frequency response of the transmission channel should be flat versus frequency. Since the cable attenuates the high frequencies, a frequency-selective boost circuit can be used to undo this effect. These circuits are called equalizers. An equalizer uses frequency-dependent elements (Ls and Cs) in order to create a frequency response that is the opposite of the rest of the channel's response in order to create an overall flat response. There are many ways to create such circuits, but a common technique is to put the frequency-selective elements in the feedback path of an op amp circuit. The AD8130 in particular makes this easier than other circuits, because, once again, the feedback path is totally independent of the input path and there is no interaction. The circuit in Figure 7 was developed as a receiver/equalizer for transmitting composite video over 300 m of Category 5 cable. This cable has an attenuation of approximately 20 dB at 10 MHz for 300 m. At 100 MHz, the attenuation is approximately 60 dB. (See Figure 8.)
+V
+V
AD8130
0.1 F + PD +VS VOUT -VS 10 F
VIN
+
0.1 F 10 F
-V
Figure 6. An AD8130 with Unity Gain
The input signal can be applied either differentially or singleendedly--all that matters is the magnitude of the differential signal between the two inputs. For single-ended input applications, applying the signal to the +IN with -IN grounded will create a noninverting gain, while reversing these connections will create an inverting gain. Since the two inputs are highimpedance and matched, both of these conditions will provide the same high input impedance. Thus, an advantage of the active feedback architecture is the ability to make a high-inputimpedance, inverting op amp. If conventional op amps are used, a high impedance buffer followed by an inverting stage is needed. This requires two op amps.
AD8130
+ 100 + -VS PD +VS
0.1 F
10 F
VIN
VOUT
R1 100 C1 200pF
RG 499
RF 1k -V
0.1 F
10 F
Figure 7. An Equalizer Circuit for Composite Video Transmission over 300 m of Category 5 Cable
REV. 0
-21-
AD8129/AD8130
20 10 0 -10 20 10 0 -10
I/O RESPONSE
I/O RESPONSE
-20 -30 -40 -50 -60 -70 -80 10k
-20 -30 -40 -50 -60 -70 -80 10k
100k
1M FREQUENCY - Hz
10M
100M
100k
1M FREQUENCY - Hz
10M
100M
Figure 8. Transmission Response of 300 m of Category 5 Cable
Figure 10. Combined Response of Cable Plus Equalizer
Output Offset/Level Translator
The feedback network is between Pins 6 and 5 and from Pin 5 to ground. C1 and RF create a corner frequency of about 800 kHz. The gain increases to provide about 15 dB of boost at 8 MHz. The response of this circuit is shown in Figure 9.
20
The circuit in Figure 6 has the reference input (Pin 4) tied to ground, which produces a ground-referenced output signal. If it is desired to offset the output voltage from ground, the REF input can be used. (See Figure 11). The level VOFFSET appears at the output with unity gain.
+V
10 0 -10
I/O RESPONSE
AD8130
VIN VOFFSET + PD +VS
0.1 F
10 F
-20 -30 -40 -50 -60 -70 -80 10k
VOUT = VIN +VOFFSET + -VS
0.1 F -V
10 F
100k
1M FREQUENCY - Hz
10M
100M
Figure 9. Frequency Response of Equalizer Circuit
Figure 11. The voltage applied to Pin 4 adds to the unitygain output voltage produced by VIN.
It is difficult to come up with the exact component values via strictly mathematical means, because the equations for the cable attenuation are approximate and have functions that are not simply related to the responses of RC networks. The method used in this design was to approximate the required response via graphical means from the frequency response, and then select components that would approximate this response. The circuit was then built and measured, and finally adjusted to obtain an acceptable response--in this case flat to 9 MHz to within approximately 1 dB. (See Figure 10.)
If the circuit has a gain higher than unity, the gain has to be factored in. If RG is connected to ground, the voltage applied to REF will be multiplied by the gain of the circuit and appear at the output; just like a noninverting conventional op amp, This situation is not always desirable and one may want VOFFSET to appear at the output with unity gain. One way to accomplish this is to drive both REF and RG with the desired offset signal. (See Figure 12.) Superposition can be used to solve this circuit. First break the connection between VOFFSET and RG. With RG grounded the gain from Pin 4 to VOUT will be 1 + RF/RG. With Pin 4 grounded, the gain though RG to VOUT is -RF/RG. The sum of these is +1. If VREF is delivered from a low-impedance source, this will work fine. However, if the delivered offset voltage is derived from a high-impedance source, like a voltage divider, its impedance will affect the gain equation. This makes the circuit more complicated as it creates an interaction between the gain and offset voltage.
-22-
REV. 0
AD8129/AD8130
+V
Summer
AD8129/ AD8130
0.1 F VIN VOFFSET RG RF -V 0.1 F 10 F + PD +VS
10 F
A general summing circuit can be made by the above technique. A unity-gain configured AD8130 has one signal applied to +IN, while the other signal is applied to REF. The output will be the sum of the two input signals. (See Figure 15.)
+V
+ -VS
V OUT = V IN (1+ R F /R G ) +V OFFSET
AD8130
V1 + PD +VS
0.1 F
10 F
V2
+ -VS
VOUT = V1 + V2
Figure 12. In this circuit, VOFFSET appears at the output with unity gain. This circuit works well if the VOFFSET Source Impedance is low.
0.1 F 10 F
A way around this is to apply the offset voltage to a voltage divider whose attenuation factor matches the gain of the amplifier, and then apply this voltage to the high-impedance REF input. This circuit will first divide the desired offset voltage by the gain, and the amplifier will multiply it back up to unity. (See Figure 13.)
+V
-V
Figure 15. A Summing Circuit that is Noninverting with High Input Impedance
This circuit offers several advantages over a conventional op amp inverting summing circuit. First, the inputs are both highimpedance and the circuit is noninverting. It would require significant additional circuitry to make an op amp summing circuit that has high input impedance and is noninverting. Another advantage is that the AD8130 circuit still preserves the full bandwidth of the part. In a conventional summing circuit, the noise gain is increased for every additional input, so the bandwidth response decreases accordingly. By this technique, four signals can be summed by applying them to two AD8130s, and then summing the two outputs by a third AD8130.
Cable-Tap Amplifier
AD8129/ AD8130
VIN VOFFSET RF RG + PD +VS
0.1 F
10 F
+ -VS
V OUT = V IN (1+R F /R G ) + VOFFSET
RG
RF -V 0.1 F 10 F
Figure 13. Adding an attenuator at the offset input causes it to appear at the output with unity gain.
Resistorless Gain-of-Two
It is often desirable to have a video signal drive several different pieces of equipment. However, the cable should only be terminated once at its end point, so it is not appropriate to have a termination at each device. A "loop-through" connection allows a device to tap the video signal while not disturbing it by any excessive loading. Such a connection, also referred to as a cable-tap amplifier, can be simply made with an AD8130. (See Figure 16.) The circuit is configured with unity gain, and if no output offset is desired, the REF pin is grounded. The negative differential input is connected directly to the shield of the cable (or an associated connector) at the point at which it wants to be "tapped."
+V
The voltage applied to the REF input (Pin 4) can also be a high bandwidth signal. If a unity-gain AD8130 has both +IN and REF driven with the same signal, there will be unity gain from VIN and unity gain from VREF. Thus, the circuit will have a gain of two, and requires no resistors. (See Figure 14.)
+V
AD8130
AD8130
0.1 F VIN + PD +VS VOUT -VS 10 F
75 + PD +VS
0.1 F
10 F
+
+ -VS
VOUT
VIDEO IN
-V 0.1 F 10 F
0.1 F 75 -V
10 F
Figure 14. Gain-of-Two Connections with No Resistors
Figure 16. The AD8130 can tap the video signal at any point along the cable without loading the signal.
REV. 0
-23-
AD8129/AD8130
The center conductor connects to the positive differential input of the AD8130. The amplitude of the video signal at this point is unity, because it is between the two termination resistors. The AD8130 provides a high impedance to this signal, so it does not disturb it. A buffered, unity-gain version of the video signal appears at the output.
Power-Down
+V
AD8130
VIN 1N4148 + PD +VS
0.1 F
10 F
VIN
+ -VS
VOUT
The AD8129/AD8130 have a power-down pin that can be used to lower the quiescent current when the amplifier is not being used. A logic low level on the PD pin will cause the part to power down. Since there is no "Ground" pin on the AD8129/AD8130, there is no logic reference to interface to standard logic levels. For this reason, the reference level for the PD input is +VS. If the AD8129/AD8130 are run with +VS = 5 V, there will be direct compatibility with logic families. However, if +VS is higher than this, a level-shift circuit will be needed to interface to conventional logic levels. A simple level-shifting circuit that is compatible with common logic families is presented in Figure 17.
+VS
0.1 F -V
10 F
Figure 18. Clamping Diodes at the Input Limit the Input Swing Amplitude
Another problem can occur with the AD8129 operating at supply voltage of greater than or equal to 12 V. The architecture causes the supply current to increase as the input differential voltage increases. If the AD8129 differential inputs are overdriven too far, excessive current can flow in the device and potentially cause permanent damage. A practical means to prevent this from occurring is to differentially clamp the inputs with a pair of antiparallel Schottky diodes. (See Figure 19.) These diodes have a lower forward voltage of approximately 0.4 V. If the differential voltage across the inputs is restricted to these conditions, no excess current will be drawn by the AD8129 under these operating conditions. If the supply voltage is restricted to less than 11 V, the internal clamping circuit will limit the differential voltage and excessive supply current will not be drawn. The external clamp circuit is not needed.
+V
1k 3 PD LOW= POWER-DOWN 4.99k 2N2222 OR EQ
7 +VS
AD8129/ AD8130
Figure 17. Circuit that Shifts the Logic Level when +VS Is Not Equal to Approximately 5 V
Extreme Operating Conditions
The AD8129/AD8130 are designed to provide high performance over a wide range of supply voltages. However, there are some extremes of operating conditions that have been observed to produce non-optimal results. One of these conditions occurs when the AD8130 is operated at unity gain with low supply voltage--less than approximately 4 V. At unity gain, the output drives FB directly. At supplies of VS less than approximately 4 V and unity gain, the voltage on FB can be driven by the output too close to the rail for the circuit to stay properly biased. This can lead to a parasitic oscillation. A way to prevent this is to limit the input signal swing with clamp diodes. Common silicon junction signal diodes like the 1N4148 have a forward bias of approximately 0.7 V when about 1 mA of current flow through them. Two series pairs of such diodes connected antiparallel across the differential inputs can be used to clamp the input signal and prevent this condition. It should be noted that the REF input can also shift the output signal, so this technique will only work when REF is at ground or close to it. (See Figure 18.)
AD8129
VIN AGILENT HSMS 2822 VIN 1 2 0.1 F 3 + PD +VS VOUT -VS 10 F
+
0.1 F -V
10 F
Figure 19. Schottky Diodes Across the Inputs Limits the Input Differential Voltage
In both circuits, the input series resistors function to limit the current through the diodes when they are forward-biased. As a practical matter, these resistors need to be matched to the degree that the CMRR needs to be preserved at high frequency. These resistor will have minimal effect on the CMRR at low frequency.
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REV. 0
AD8129/AD8130
Power Dissipation
The AD8129/AD8130 can operate with supply voltages from +5 V to 12 V. The major reason for such a wide supply range is to provide a wide input common-mode range for systems that might require this. This would be encountered when significant common-mode noise couples into the input path. For applications that do not require a wide input or output dynamic range, it is recommended to operate with lower supply voltages. The AD8129/AD8130 is also available in a very small Micro_SO-8 package. This has higher thermal impedance than larger packages and will operate at a higher temperature with the same amount of power dissipation. Certain operating conditions that are within the specification range of the parts can cause excess power dissipation. Caution should be exercised. The power dissipation is a function of several operating conditions. These include the supply voltage, the input differential voltage, the output load and the signal frequency. A basic starting point is to calculate the quiescent power dissipation with no signal and no differential input voltage. This is just the product of the total supply voltage and the quiescent operating current. The maximum operating supply voltage is 26.4 V and the quiescent current is 13 mA. This causes a quiescent power dissipation of 343 mW. For the Micro_SO package, the JA specification is 142C/W. So the quiescent power will cause about a 49C rise above ambient in the Micro_SO package. The current consumption is also a function of the differential input voltage. (See TPCs 109 and 110.) This current should be added on to the quiescent current and then multiplied by the total supply voltage to calculate the power. The AD8129/AD8130 can directly drive loads of as low as 100 , such as a terminated 50 cable. The worst-case power dissipation in the output stage occurs when the output is at midsupply. As an example, for a 12 V supply and the output driving a 250 load to ground, the maximum power dissipation in the output will occur when the output voltage is 6 V.
The load current will be 6 V/250 = 24 mA. This same current will flow through the output across a 6 V drop from +VS. This will dissipate 144 mW. For the Micro_SO-8 package, this causes a temperature rise of 20C above ambient. Although this is a worstcase number, it is apparent that this can be a considerable additional amount of power dissipation. Several changes can be made to alleviate this. One is to use the standard SO-8 package. This will lower the thermal impedance to 121C/W, which is a 15% improvement. Next is to use a lower supply voltage unless absolutely necessary. Finally, do not use the AD8129/AD8130 to directly drive a heavy load when it is operating on high supply voltages. It is best to use a second op amp after the output stage. Some of the gain can be shifted to this stage so that the signal swing at the output of the AD8129/AD8130 is not too large.
Layout, Grounding and Bypassing
The AD8129/AD8130 are very high-speed parts that can be sensitive to the PCB environment in which they have to operate. Realizing their superior specifications requires attention to various details of standard high-speed PCB design practice. The first requirement is for a good solid ground plane that covers as much of the board area around the AD8129/AD8130 as possible. The only exception to this is that the ground plane around the FB pin should be kept a few mm away, and ground should be removed from inner layers and the opposite side of the board under this pin. This will minimize the stray capacitance on this node and help preserve the gain flatness versus frequency. The power supply pins should be bypassed as close as possible to the device to the nearby ground plane. Good high-frequency ceramic chip capacitors should be used. This bypassing should be done with a capacitance value of 0.01 F to 0.1 F for each supply. Further away, low frequency bypassing should be provided with 10 F tantalum capacitors from each supply to ground. The signal routing should be short and direct in order to avoid parasitic effects. Where possible, signals should be run over ground planes to avoid radiating, or to avoid being susceptible to other radiation sources.
REV. 0
-25-
AD8129/AD8130
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SOIC (SO-8)
0.1968 (5.00) 0.1890 (4.80)
8 5 4
0.1574 (4.00) 0.1497 (3.80) PIN 1
1
0.2440 (6.20) 0.2284 (5.80)
0.0500 (1.27) BSC 0.0098 (0.25) 0.0040 (0.10) SEATING PLANE 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 8 0.0098 (0.25) 0 0.0075 (0.19)
0.0196 (0.50) 0.0099 (0.25)
45
0.0500 (1.27) 0.0160 (0.41)
8-Lead Micro_SO (RM-8)
0.122 (3.10) 0.114 (2.90)
8
5
0.122 (3.10) 0.114 (2.90)
1 4
0.199 (5.05) 0.187 (4.75)
PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27
0.028 (0.71) 0.016 (0.41)
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REV. 0
-27-
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C02464-2.5-4/01(0)
PRINTED IN U.S.A.

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